398 www.xilinx.com System Generator for DSP User Guide
UG640 (v 12.2) July 23, 2010
Chapter 5: System Generator Compilation Types
Generate the Example Design
We'll generate the design using the Timing Analysis target and a requested period of 1.4ns
(714MHz). This is admittedly a very high clock frequency, but we wish some paths to fail
for demonstration purposes. We set these parameters in the System Generator token:
Examine the Slow Paths
After clicking on Generate, after a time, the timing analyzer window will appear as shown
below:
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