MATLAB DESIGN HDL CODER RELEASE NOTES User's Guide download pdf (Page 235)

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UG640 (v 12.2) July 23, 2010

Ethernet Hardware Co-Simulation

Point-to-Point Ethernet Hardware Co-Simulation

Point-to-point Ethernet Hardware Co-simulation provides a co-simulation interface using

a raw Ethernet connection. The raw Ethernet connection refers to a Layer 2 (a.k.a. Data-

Link Layer) Ethernet connection, between a supported FPGA development board and a

host PC, with no network routing equipment along the path. By taking the advantage of

the ubiquity and advancement of Ethernet technologies, the interface facilitates a

convenient and high-bandwidth co-simulation to an external FPGA device.

Interface Features

The interface supports 10/100/1000 Mbps half/full duplex modes. Jumbo Frame is also

supported on a Gigabit Ethernet, provided it is enabled by the underlying connection. For

FPGA device configuration, the interface supports either JTAG-based configuration over a

Xilinx Parallel Cable IV or a Xilinx Platform USB cable, or , for selected boards, Ethernet-

based configuration over the same Point-to-point Ethernet connection for co-simulation.

Note:

This co-simulation interface utilizes an evaluation version of the Ethernet MAC core. Because

this is an evaluation version of the core, it will become dysfunctional after continuous, prolonged

operation (e.g., around 7 hours) in the target FPGA. Operation of the core will restart with a new

simulation. For more information about obtaining the full version of the core, please visit the product

page at http://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?key=TEMAC

Supported FPGA Development Boards

Development boards that support point-to-point ethernet hardware co-simulation are

listed in the topic Ethernet-Based Hardware Co-Simulation. Links to the appropriate board

installation instructions are also provided.

Configuring Co-Simulation Block Parameters

There are several block parameters specific to the Point-to-point Ethernet co-simulation

interface. The rest of this topic describes step-by-step how to configure the parameters of

the Point-to-point Ethernet co-simulation block. Refer to the topic Point-to-point Ethernet

Co-Simulation in the Xilinx Block section for details of all the block parameters.

1. Use the Basic tab to select the appropriate clock source for the co-simulation.

Select a Clock

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MATLAB DESIGN HDL CODER RELEASE NOTES User's Guide Page 235