MATLAB DESIGN HDL CODER RELEASE NOTES User's Guide download pdf (Page 370)

370 www.xilinx.com System Generator for DSP User Guide

UG640 (v 12.2) July 23, 2010

Chapter 4: Importing HDL Modules

Importing, Simulating, and Exporting an Encrypted VHDL File

This example show you how to import an encrypted VHDL file into a Black Box block,

simulate the design, then export the VHDL out as an encrypted file that is separate from the rest

of the netlist.

Black Box Tutorial Example 8: Importing, Simulating, and Exporting an

Encrypted VHDL File

1. From MATLAB, open the following MDL file:

<ISE_Design_Suite_tree>/sysgen/examples/black_box/example7/blac

k_box_ex7.mdl

This design imports an encrypted VHDL file generated from the licensed core Color

Correction Matrix v1.0. The input to the core is a 24-bit RGB signal {R, G, B} and the

output is a Color transformed 24-bit signal {Rt, Gt, Bt} signal such that :

The active_video_in signal is used to mark each video_data_in sample as valid. The

signals hblank_in and vblank_in are ignored in this example design. Refer to the

Color Correction Matrix v1.0 LogiCORE datasheet for more information on this core.

2. The file named encrypted_hdl_import.vhd is the encrypted simulation model

generated by Core Generator. In order to import this encrypted simulation model, you

must first create a VHDL wrapper file that instantiates the encrypted VHDL model.

You then import this wrapper file using the standard Black Box Configuration Wizard.

This process is described in the topic Black Box Tutorial Example 2: Importing a Core

Generator Module that Needs a VHDL Wrapper to Satisfy Black Box HDL

Requirements and has already been done for you in this example.

During the Black Box creation process, the Black Box Configuration Wizard creates a

configuration file named encrypted_hdl_import_wrapper_config.m.

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MATLAB DESIGN HDL CODER RELEASE NOTES User's Guide Page 370