52 www.xilinx.com System Generator for DSP Getting Started Guide
UG639 (v 12.2) July 23, 2010
Chapter 4: Getting Started
Lesson 1 Summary
• You partition the FPGA design from the Simulink “system” using Gateway In /
Gateway Out blocks.
• You always include a System Generator token on each sheet
• You should only use blocks from the Xilinx DSP blockset between the gateway blocks
• You should consider using the From / To workspace blocks to use MATLAB for input
generation and output analysis
Lab Exercise: Using Simulink
In this lab, you will learn the basics of Simulink. You will use a Simulink blockset to
generate a simple design and take it through simulation. You will then change the
sampling settings to see its effect on the output. You will then learn how to create a
subsystem.
The lab instructions are located in the System Generator software tree at the following
pathname:
<ISE_Design_Suite_tree>/sysgen/examples/getting_started_training/lab1/lab
1.pdf
Lab Exercise: Getting Started with System Generator
This lab introduces you to the basic concepts of creating a design using System Generator
within the model-based design flow provided through Simulink. The design is a simple
multiply-add circuit.
The lab instructions and lab design are located in the System Generator software tree at the
following pathname:
<ISE_Design_Suite_tree>/sysgen/examples/getting_started_training/lab2/
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