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UG639 (v 12.2) July 23, 2010
Post Installation Tasks
Configuring the System Generator Cache
Both the System Generator simulator and the design generator incorporate a disk cache to
speed up the iterative design process. The cache does this by tagging and storing files
related to simulation and generation, then recalling those files during subsequent
simulation and generation rather than rerunning the time consuming tools used to create
those files.
Setting the Size
By default, the cache will use up to 500 MB of disk space to store files. To specify the
amount of disk space the cache should use, set the SYSGEN_CACHE_SIZE environment
variable to the size of the cache in megabytes. Set this number to a higher value when
working on several large designs.
Setting the Number of Entries
The cache entry database stores a fixed number of entries. The default is 20,000 entries. To
set size of the cache entry database, set the SYSGEN_CACHE_ENTRIES environment
variable to the desired number of entries. Setting this number too small will adversely
affect cache performance. Set this number to a higher value when working on several large
designs.
You can use the
xlCache function to manage and inspect the properties of difference caches
used by System Generator. A detailed description of this function can be found under the
topic
System Generator Utilities.
Displaying and Changing Versions of System Generator
It is possible to have several versions of System Generator installed. The MATLAB
command xlVersion displays which versions are installed, and makes it possible to
switch from one to another. xlVersion is useful when upgrading a model to run in the
latest version of System Generator.
Entering "xlVersion" in the MATLAB console displays the versions of System Generator
that are installed, and entering "xlVersion <version>" switches to the specified
version. For example, if the versions that are installed are 11.4 and 12.1, and the currently
selected version is 12.1, then entering "xlVersion" displays
Available System Generator installations:
Version 11.4 in C:/Xilinx/11.4/DSP_Tools/sysgen
Version 12.1 in C:/Xilinx/12.1_ISE_DS/ISE/sysgen
Current version of System Generator is 12.1.
Entering "xlVersion 11.4" switches the System Generator version to 11.4.
Occasionally, it is necessary to restart MATLAB to make it possible to switch. In this case,
the response to entering "xlVersion 12.1" looks like the following:
Please restart MATLAB and run xlVersion 12.1 again to switch.
When the switch succeeds, xlVersion prints the following:
Your System Generator has been switched. Please restart MATLAB.
If you install System Generator 11.4 after you install 12.1, you need to install 12.1 again in
order to make xlVersion work.
Once you switch System Generator version, you need to switch to the right version of ISE
in order to make System Generator work correctly.
- Generator for 1
- Table of Contents 3
- Chapter 4: Getting Started 4
- About This Guide 7
- Additional Resources 8
- Conventions 8
- Online Document 9
- Preface: About This Guide 10
- Introduction 11
- The Xilinx DSP Block Set 12
- FIR Filter Generation 13
- Support for MATLAB 14
- System Resource Estimation 15
- Hardware Co-Simulation 16
- System Integration Platform 17
- Chapter 1: Introduction 18
- Installation 19
- Chapter 2: Installation 20
- Table 2-3: 20
- Table 2-4: 20
- UNC Paths Not Supported 21
- Software Prerequisites 21
- Post Installation Tasks 22
- UG639 (v 12.2) July 23, 2010 23
- ModelSim SE 24
- Setting the Size 25
- Setting the Number of Entries 25
- Release Information 27
- Hardware Recommendations 28
- Known Issues 29
- Release Notes 12.1 30
- Xilinx Blockset Enhancements 31
- Release Notes 11.4 35
- Table 3-5: 37
- Table 3-6: 37
- Release Notes 11.3 39
- Existing Block Updates 40
- Table 3-7: 41
- Table 3-8: 41
- Getting Started 43
- ® Simulator 44
- The Xilinx DSP Blockset 45
- Defining the FPGA Boundary 46
- Creating the DSP Design 48
- Generating the HDL Code 49
- Chapter 4: Getting Started 50
- DSP blockset 50
- Lesson 1 Summary 52
- Lab Exercise: Using Simulink 52
- Fixed-Point Numeric Precision 53
- Overflow and Round Modes 55
- Bit-Level Operations 56
- The Reinterpret Block 57
- The Convert Block 58
- The Concat Block 59
- Slice Block 60
- The BitBasher Block 61
- Lesson 2 Summary 62
- Lab Exercise: Signal Routing 62
- Lesson 3 - System Control 63
- The MCode Block 64
- State Machine Example 66
- The Expression Block 67
- Reset and Enable Ports 68
- Bursty Data 69
- Lesson 3 Summary 70
- Lab Exercise: System Control 70
- Lesson 4 - Multi-Rate Systems 71
- Up and Down Sampling Blocks 72
- Debugging Tools 75
- Sample Period “Rules” 76
- Lesson 5 - Using Memories 78
- Initializing RAMs and ROMs 79
- System Generator RAM Blocks 80
- System Generator ROM Blocks 81
- The Delay Block 82
- The FIFO Block 83
- Shared Memory Block 84
- Lab Exercise: Using Memories 85
- Lesson 6 - Designing Filters 86
- The Virtex DSP48 Math Slice 87
- FIR Compiler Block 88
- Using FDA Tool Coefficients 90
- Virtex®-5 architecture 91
- Black Box Examples 92
- ChipScope Examples 92
- DSP Examples 93
- M-Code Examples 94
- Processor Examples 94
- Shared Memory Examples 95
- Timing Analysis Examples 96
- Miscellaneous Examples 96
- System Generator Demos 97
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